Digital Hardware Design for Test Engineer - Sophia Antipolis, France - NXP Semiconductors

NXP Semiconductors
NXP Semiconductors
Entreprise vérifiée
Sophia Antipolis, France

il y a 1 semaine

Sophie Dupont

Posté par:

Sophie Dupont

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Description

Business Unit Description/Business Line Description/ Local team description:
In the MCU-MPU Engineering organization, the System-On-Chip team based in Sophia Antipolis is in charge of the i.
MX product family development. We are looking for a senior design for test digital hardware engineer.


In this exciting role, you will be challenged by taking your part in the future of Automotive for the i.

MX9 and i.
MX10 next generation development.


Your responsibilities:


As a key member of the team, you will work in a multi-cultural environment with multi-function teams/sites to implement state-of-the-art DFT solutions appropriate for new and existing technologies.

You will work on front-end RTL DFT design with the goal to reduce test time, increase coverage and achieve high design quality.

Your focus could be in the areas of test control, memory bist, scan logic, analog testing, or other DFT-related specialties.


Your profile:


  • 10+ years of experience in digital design
  • Master's degree in Electrical Engineering Computer Engineering or Electrical Computer Engineering.
  • Scan/ATPG low coverage debug
  • ATPG GLS with timing validation
  • ATPG memory and complex cell modeling
  • Scan DRC and netlist quality debug
  • Silicon pattern generation and pattern retargeting
  • Silicon pattern debug and diagnosis
  • Requires experience with cross functional teams and good communication skills to operate in a global environment with multiple partners.
  • Fluent in English language both oral and written
  • Excellent communication skills, both verbal and in writing.
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