Junior Physical Implementation Engineer - Sophia Antipolis, France - Menta

Menta
Menta
Entreprise vérifiée
Sophia Antipolis, France

il y a 2 semaines

Sophie Dupont

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Sophie Dupont

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Description
Full time, based in Sophia Antipolis, France._


Job description


Within the Hardware Physical Implementation team, you will be in charge of doing the ASIC physical implementation of eFPGA IP architectures (from RTL to GDSII) to bring them into production.

This is a challenging position and an opportunity to work within a small but highly qualified team.

You will get the chance to work on one of the most exciting new semiconductor products and on the most advanced process nodes (from 180nm to 5nm and beyond).


Desired skills and experience

  • 1 to 2 years of relevant experience in ASIC physical implementation
  • Knowledge of digital backend EDA tool flows: Synthesis, Place and Route, STA, Formal-Verification and Signoff checks (LVS/DRC/EM-IR/ )
  • Knowledge of Synopsys tools (DC, ICC, ICC2, Primetime, StarRC, etc.) is a must. Knowledge of Mentor Graphics Calibre and Cadence tools are a plus
  • Knowledge of Powermanagement concepts is a plus
  • Experience at IP level and IP integration at top level
  • Experience on advanced technology nodes, such as 28nm, 22nm, 12nm and below is a plus
  • Experience with make files and scripting languages such as Tcl, Python and bash
  • Technical background in RTL design (VHDL, Verilog, SystemVerilog) and/or RTL synthesis is a plus
  • Good listening and communication skills
  • Selfreliant and solid team player skills
  • Good analytical and problemsolving skills
  • Good written and spoken English is mandatory
  • MSc or PhD in Electrical Engineering or equivalent
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