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    Senior Silicon Physical Design Engineer - Paris, France - Axelera AI

    Axelera AI
    Axelera AI Paris, France

    il y a 2 semaines

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    Description

    Type

    Full-time

    Department

    Silicon Engineering

    About Us

    We are a trailblazing semiconductor startup based in Europe, dedicated to pushing the boundaries of technology with a focus on cutting-edge multi-core in-memory compute SoCs. As a member of our physical design team, you will play a crucial role in driving our continuous success and innovation.

    Location

    We offer a flexible, hybrid work arrangement and, if necessary, support for international relocation to work from one of Axelera AI offices in the Netherlands, Italy, or the UK.

    Position Overview

    As a Senior Silicon Physical Design Engineer at our company, you will be a key contributor to our physical design team, tasked with developing Axelera's state-of-the-art multi-core in-memory compute SoCs. Your extensive expertise in ASIC Physical Design, from RTL to GDS, will enable you to create physical design partitions that adhere to the highest industry standards. Your role will involve various tasks such as synthesis, floor planning, place and route, extraction, timing analysis, physical verification, EMIR signoff, and formal verification, requiring close collaboration with architecture and RTL teams for successful project completion.

    Experience: You should possess a minimum of 10 years of experience in Physical Design, with a proven track record of executing designs from RTL to GDS.

    Communication and Teamwork: Strong communication and teamwork skills are essential, allowing you to effectively contribute to diverse and inclusive teams.

    Design Process: Your expertise should cover synthesis, floor planning, place and route, extraction, timing analysis, and physical verification, along with a comprehensive understanding of constraints generation, STA, timing optimization, and timing closure.

    EDA Tools: Hands-on experience with EDA tools like Primetime, StarRC, Genus, Innovus, Design Compiler, ICC/ICC2, FC, and Calibre is required.

    Clocking: Proficient understanding of clock tree synthesis (CTS) and various clock-building techniques is expected.

    IP Integration: Experience in IP integration, encompassing memories, IOs, embedded processors, double data rate, networking fabrics, and Analog IP.

    Scripting: Proficiency in scripting languages such as Python, Tcl, or Perl is preferred.

    Problem Solving: Strong technical problem-solving and debugging abilities are necessary.

    Language Skills: Fluent in English, both spoken and written.

    Desirable Experience and Skills:

    • Top-Level Integration: Expertise in chip top-level integration, I/O ring design, ESD, and latch-up methodologies.
    • Collaboration: Experience working with packaging teams and conducting chip-package-board co-simulations.
    • Influence: Ability to influence tools, flows, and overall design methodology.
    • Vendor Collaboration: Experience collaborating directly with tool vendors to address tool issues and drive improvements.
    • Semiconductor Knowledge: Understanding of semiconductor device physics and transistor characteristics.
    • Multi-Domain Design: Experience with multi-clock, multi-power-domain design.
    • Continuous Integration: Knowledge of continuous integration methodology and creating regression test suites.
    • Process Management: Ability to establish processes and checks for receiving releases from IP vendors and providing IP releases to internal teams.
    • Autonomous Work: Capable of independently planning and executing research tasks.
    • Responsibility: Strong sense of responsibility and thrive in a challenging environment where turning the impossible into possible is the norm.

    What we offer

    This is your opportunity to shape and be part of a dynamic, fast-growing international organization. We provide an attractive compensation package, including a pension plan, comprehensive employee insurances, and the option to acquire company shares.

    An open culture that fosters creativity and continuous innovation awaits you. We promote collaborative ownership and offer freedom with responsibility as core values in our teamwork.

    At Axelera AI, we strongly believe in equal opportunities and prioritize diversity. Our unwavering commitment is to nurture an inclusive environment that empowers and celebrates every team member. We welcome individuals from all backgrounds to join us in influencing the future of AI.

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