Principal Physical Design Engineer - Sophia Antipolis, France - NXP Semiconductors

NXP Semiconductors

Entreprise vérifiée

Sophia Antipolis, France

il y a 1 semaine

Posté par:

Sophie Dupont

beBee Recruiter

Description

Ready to join the future of innovation in SOC Physical Design
?

This opening is within the Microprocessor and Microcontroller Engineering(MME) SoC Implementation Organization, a central Physical Design group responsible for end-to-end Physical implementation of the Automotive and Industrial Automation Processors in NXP.

This is a dynamic team with operations in 7 locations around the world.

In this role, you will have deep exposure and involvement in the full RTL2GDS flow, the ability to interact and collaborate with colleagues in USA, India and China on methodologies, efficiencies and new innovations.

As a Principal Physical Design Engineer, you will be expected to provide technical leadership to the Mougins Implementation team, drive key technical initiatives and also own and successfully execute on a significant SOC project:

Your responsibilities

Responsible for all aspects of Static Timing Analysis(STA) including working with the architecture and front end designers for timing changes, create and verify constraints, perform hierarchical timing budgeting and analysis, create ECOs and drive timing closure for subsystem and SOC.
Physical Design ( synthesis, Place& Route, STA) owner/driver of key critical IP subsystem implementation.
Partner with the Implementation team to drive the low power methodology, including leakage and dynamic power recovery.
Helps construct/streamline timing flow and process automation for continuous improvement.
Mentors junior engineers and supports Si bring up.

Your team

NXP MME SOC-Implementation team is a highly productive and dynamic organization which has a track record of successful product development and innovation.

We are a diversified team with high energy, an open collaborative environment and eagerness for continuous improvement. Innovation is strongly encouraged as evidenced by the track record of invention disclosures.

The SOC implementation team is 303 engineers strong across 7 sites in 3 different geographies. Each site reports directly to the leader of the implementation organization. The team has strong linkages to the architecture, RTL, DFT and IP teams within MME. There are additional linkages with the Technology, Design Enablement, Packaging and IT organizations.

The product development of a large significant portion of NXP roadmap comes out of the MME organization and consequently there is very high visibility to the NXP Management team.

Your profile
To be successful in this role you must have:

BS or MS in Electrical or Computer Engineering
10+ years in all aspects of Physical Design on a subsystem and SoC level.
Strong expertise in STA, Synthesis and Auto Place&Route
Knowledge in deep submicron CMOS process technology (16ffc and beyond), Crosstalk and Si debug.
Requires experience working with cross functional multisite teams and good communication skills to operate in a global environment.

Furthermore, you should have: