Analog Design Engineer - Rousset, France - Microchip Technology

Microchip Technology

Entreprise vérifiée

Rousset, France

il y a 2 semaines

Posté par:

Sophie Dupont

beBee Recruiter

Description

At Microchip, we work every day to innovate and develop products that solve our customers' technology challenges.

Our team of more than 20,000 people worldwide is dedicated to delivering on the promise of working together to improve lives.

Learn about our

guiding values

that are the building blocks and foundation of our culture and discover how we make a positive impact in the communities in which we operate.

We believe our culture fosters trust, collaboration and belonging.

Our people serve the industrial, computing, automotive, communications, aerospace and defense, and consumer market segments.

As part of our global team, you can build technology solutions in our six growth areas - 5G, data centers, autonomous driving, the Internet of Things, electric vehicles, and artificial intelligence and machine learning.

Around the world, we are committed every day to recruiting, retaining and promoting people in our diverse workforce. Your perspective, passion and ingenuity will contribute to achieving more as we fulfill our

mission

as a leading provider of smart, connected and secure embedded control solutions.

Join our community of exceptional people doing incredible things.

Job Description:

You will be part of the Consolidated IP Group - Analog Design Team and more specifically of Analog Design Engineering Team located in Rousset.

This team is in charge of providing the analog IPs embedded in the 32-bit microcontrollers.

Joao Carreira is the manager of the team and Renaud Dura will be your tutor.

This team is responsible for:

Designing the analog IPs based on specifications from Marketing/Architecture Team.

Define transistor-level architecture of the IPs.

Do transistor-level schematic and simulate it over Process, Voltage, Temperature.- Drive the Full-Custom Analog Layout

Check the performances of the analog IPs after Layout- Release all the collaterals necessary to the SoC Team- Provide Place and Route Guidelines for integration.- Design Test Chip for analog IPs and check the performances with Analog Validation Team.

- Provide Customer support

Your mission will consist in designing a Fast 12-bit ADC in a 28nm CMOS technology. The current structures are limited to a few Msps.

Research and innovative structures on the input sample-and-hold and/or on the SAR ADC core are needed to go above 10Msps with a good speed/power/area compromise.

What are the different phases of the stage?- Introduction:
Understand the purpose of this ADC from a system point of view.

Get familiar with the existing ADC structures.- Bibliographic search to identify state-of art architectures in terms of speed, accuracy, area and power.

Based on this search, select an architecture after having estimated the pros/cons with the tutor.- Create a model of the architecture selected (defined equations that will govern this design).- Design the ADC or the main improved blocks.

It means schematic creation + PVT/Monte Carlo simulations

Area estimation- Compare Figure of merit of our existing ADC with the new one.

What's attractive about this opportunity?

This position will allow you to:

Design, at transistor level, a complex analog IP
Get familiar with standard analog design tools used in semi-conductor industry (Cadence (Spectre, Virtuoso, ADE-L/XL), Calibre, Verilog-A)
Get familiar with our analog design flow.
Turn into practice your knowledge in microelectronic and especially the ones in CMOS analog design.
Interaction with many teams (worldwide)

Requirements/Qualifications:
Qualifications and Experience