- Analyse timing correlation between the main physical implementation steps (from standard cells placement to detail routing)
- Correlate critical timing paths between static timing analysis and spice simulation
- Improve physical implementation setup and recipes to improve timing convergence
- Quantify the impact of improved timing convergence on max achievable frequency
- Students in their last year of Masters (BAC+5 or equivalent) and available for a 5 to 6-month internship. Students in electronic engineering, computer engineering, computer science, but other relevant degrees may also be considered based on experience.
- A keen curiosity about CPU, GPU and digital systems.
- Exposure or knowledge on synthesis, place and route tools and techniques.
- Excellent attention to detail and creativity
- Ability to communicate ideas effectively and good interpersonal and teamwork skills.
- Understanding of Power/Performance/Area trade-off in typical CMOS designs.
- An understanding of computer architecture fundamentals and familiarity with digital design concepts
- Familiarity with versioning environment such a git or design sync.
- Use of a Linux environment and shell programming/scripting, for example. bash, git, or make.
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Physical Design Intern - Sophia Antipolis, France - arm limited
Description
The Role
Do you want to help Arm and its partners to build outstanding products?
Arm's Sophia Antipolis design centre is located in one of the most appealing parts of France, at the heart of Europe's largest and most dynamic technology park. Surrounded by mountains and the Mediterranean Sea, this outstanding design center has delivered leading products from Arm's Cortex (TM) processor family. These CPUs power some of the world's best-selling smartphones, tablets and gaming systems, using technology that has taken user experience and performance to another level.
Now you have an opportunity to work with us on the next generation of processors that will appear in the most desirable products over the next 3 years. The local design team is a combination of expert engineers and some of the most enthusiastic and hardworking graduates from the best engineering schools. Collectively, the team is highly creative, collaborative, delivery orientated and committed.
Job Overview:
Meeting Area, Frequency, and Power requirements with a reasonable runtime is one of most meaningful activities we encounter when implementing physical IPs, CPU and GPU cores.
As part of the Silicon Enablement Physical Design Implementation team, the intern will be given ownership of an investigation topic directly related to physical implementation performance push and will learn how to implement high performance processors.
We will allocate a dedicated expert engineer to support the intern's progress.
Responsibilities:
The intern will be responsible for investigating the following topics, under supervision of a tutor, as well as share findings through regular presentation to team and reports:
Required Skills and Experience:
"Nice To Have" Skills and Experience:
Internship duration 5 to 6 months
In Return:
Working on interesting new projects is exciting, but we also know how meaningful it is to receive support. That's why throughout your internship, you can expect regular feedback and development opportunities, social activities to connect with your peers, an end of summer celebration, plus the opportunity to be *considered for future Graduate positions (*subject to performance). #getreadytogrow
Our program is crafted to give you the best start possible and support your personal growth as well as professional development.
Gain a competitive salary of 1900 Euros/month, supportive rewards package, alongside unparalleled learning and networking opportunities from the best in industry.
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