- Preferably graduate from a University or Engineering School, in Electronic Engineering or Computer Science. First experience/exposure of ASIC design flow would be beneficial.
- Exposure to synthesis/floor-planning/power planning, clock tree, place and route tools and techniques through school projects or internships
- Understanding of Power versus Performance versus Area tradeoff in typical CMOS design
- Knowledge of CPU micro-architecture concepts (cache, MMU, pipeline...)
- Ability to schedule own workload and plan tasks
- Good interpersonal skills
- Knowledge of power domain management through UPF ( and onwards)
- Knowledge or exposure of advanced process nodes (16nm and below) and advanced timing analysis concept (OCV, SOCV, noise propagation)
- Basic understanding of DFT techniques
- Experience of developing scripts (Python, Perl, tcl ...) for automation purpose
- Prior internship in SOC implementation, Sign-off or test can be an advantage
- Working in UNIX/Linux environment, with bug tracking and source code control systems, especially GIT
- Able to work in French and in English
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Graduate CPU Physical Implementation Engineer - Sophia Antipolis, France - arm limited
Description
Role Overview
Do you want to help Arm and its partners to build outstanding products?
Arm's Sophia Antipolis design centre is located in one of the most appealing parts of France, at the heart of Europe's largest and most dynamic technology park. Surrounded by mountains and the Mediterranean Sea, this exceptional design center has delivered leading products from Arm's Cortex (TM) processor family. These CPUs power some of the world's best-selling smartphones, tablets and gaming systems, using technology that has taken user experience and performance to another level.
Now, you have an opportunity to work on the next generation of processors that will appear in the most desirable products over the next 3 years. The Local design team is a good combination of very expert engineers and some of the most enthusiastic and hardworking graduates, coming from the best engineering schools. Collectively, the team is highly creative, collaborative, delivery orientated and committed.
Job Overview:
Meeting Area, Frequency and Power requirements are one of the most meaningful activities in CPU development. We work in close loop with micro-architecture designers and standards cells/Macro designers to build and improve metrics as well as the overall quality of designs targeting 3nm and below technology nodes, using a broad array of skills. We are also taking ownership of a complete implementation flow development from synthesis to GDSII, including static timing analysis, IR drop analysis and equivalence checking.
Responsibilities:
As members of the CPU implementation team, we will:
Work together with the CPU design team to identify critical paths and timing bottlenecks across IP development, enabling accurate trade-off between the various performance metrics of the designs (frequency, IPC, power, area)
Produce Power/Performance/area figures and help CPU micro-architecture improvement.
Participate in existing CPU benchmarking to get the best possible Quality of Results.
Required Skills and Experience:
"Nice To Have" Skills and Experience:
In Return:
You will work directly with engineers across the company to build next-generation CPUs. You will have a direct impact on our bottom line and the ability to deliver improvements for our customers. You will be part of a growing, fast-paced, and fun team. You will have ownership for the implementation of your work.
We have a friendly and high-performance working environment, where Arm offers a competitive benefits package in France, including: private medical insurance (employee and family), 25 days annual leave, 20-day sabbatical every four years, supplementary pension and reduction in working hours (11 days).
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